
module spi_ram_8b_64(
    input                                   clk_i,
    input                                   rstn_i,

    input                                   wen_i,
    input   [5:0]                           waddr_i,
    input   [7:0]                           wdata_i,

    input   [5:0]                           raddr_i,
    output  [7:0]                           rdata_o                         
);

reg [7:0]                                   ram_64[0:63];

integer  i;
always@(posedge clk_i or negedge rstn_i)begin
    if(!rstn_i)begin
        for (i=0; i<64; i=i+1) begin:reset_ram_64
            ram_64[i] <= 'd0;
        end
    end
    else if(wen_i)begin
        ram_64[waddr_i] <= wdata_i;
        //$display("writing data %d to address %d", wdata_i, waddr_i);
    end
end

assign rdata_o = ram_64[raddr_i];

endmodule